Integrated circuits provide the pathways for signal transport in an electrical device. An integrated circuit (IC) in a semiconductor substrate is composed of a number of active transistors contained in a silicon base layer. Overlying the silicon base layer is a metal oxide layer that is formed by reaction of a metal with oxygen. The metal typically is titanium, aluminum, or copper.
To increase the capacity of an integrated circuit, large numbers of interconnections with metal "wires" are made between one active transistor in the silicon base of the substrate and another active transistor in the silicon base of the substrate. The interconnections, collectively known as the metal interconnection of a circuit, are made through holes or vias that are cut into the metal oxide layer. The particular piece of the metal interconnection which actually makes contact with the silicon base is known as the contact. The remainder of the hole or via that has been cut in the metal oxide layer is filled with a conductive material, termed a contact plug.
Vias greater than about 0.16 .mu.m in diameter are typically filled by first depositing a layer of titanium (Ti) of about 100 .ANG. by plasma enhanced chemical vapor deposition (PECVD) on the silicon base layer. The Ti layer enhances the electrical contact between the silicon layer and the metal oxide layer.
On top of this Ti layer, a titanium nitride (TiN) barrier layer of about 500 .ANG. is next deposited by CVD, preferably by low pressure chemical vapor deposition (LPCVD). Although there are alternative methods of forming a TiN barrier layer, LPCVD is preferred. This is because only LPCVD provides the conformality, defined as the ability to exactly reproduce the surface topography of the underlying substrate, necessary to cover the bottoms and sidewalls of submicron structures with high aspect ratios. The TiN layer serves as a diffusion barrier to keep the metal in the metal oxide layer from diffusing into the silicon layer at the contact. While TiN provides an excellent contact barrier, the TiN must have a thickness of about 500 .ANG. to be effective as a barrier. If the TiN thickness is less than about 500 .ANG., the metal diffuses into the silicon.
Depending upon the size of the via, a layer of tungsten may also be deposited by CVD. The TiN layer acts as a necessary adhesive for the tungsten layer since tungsten does not adhere to metal oxides. While the absolute thickness of the tungsten layer may vary according to the size of the via to be filled, its relative thickness is about 80% of the via diameter. The tungsten layer provides an area of low resistance, which is important for current conduction in an IC.
The surface of the contact plug is then etched or polished. The resulting planarized surface is necessary for optimal metal interconnections, and thus for optimal function of the IC.
As transistor densities continue to increase, the diameter of the contact plug must decrease to allow for the increased number of interconnections. For vias with a diameter of less than about 0.16 .mu.m, however, the resistance of the contact plug metallization layer is dominated by the TiN diffusion barrier layer. Since the TiN barrier layer must remain at about 500 .ANG. for robust performance as a diffusion barrier, it follows that the portion of the contact plug that is filled with tungsten is diminished. Subsequent filling of the contact plugs with tungsten, then, provides an extra procedural step with no significant effect on the overall resistance of the contact plug. Accordingly, a process step in the formation of an IC could be eliminated, and manufacturing efficiency could be increased, if a via could be filled with a contact plug of TiN, rather than with TiN and tungsten. Therefore, a method of forming a TiN contact plug by CVD and eliminating a tungsten layer in the contact plug in the formation of an integrated circuit is needed.
TiN films deposited by CVD, however, have relatively high stress. A film with high stress, measured in force per unit area, has a high intensity of internally distributed forces or components of forces that resist a change in volume or shape of the film when the film is subjected to external forces. The high stress limits the maximum film thickness that can be deposited. Typically, the maximum thickness of a TiN film deposited by CVD over conventional first level oxides is about 800 .ANG.. TiN films that are thicker than about 800 .ANG. begin to crack due to internal stress in the film. The thickness of a film needed to fill a via plug has been determined to be generally about 80% of the diameter of the via plug. The reason for this "80% rule" is that the deposited film must not only fill the volume of the via with a contact plug, but it must also fill the "dimple" above the contact plug. The "dimple," defined as an indentation in the TiN that is formed during filling of the via, is eliminated by depositing more TiN on top of the plug, resulting in a capping layer. Thus, calculation of the maximum contact plug diameter that can be filled with a conventional TiN deposit by CVD is obtained by dividing 800 .ANG. by 80%, resulting in a maximum contact diameter of about 1000 .ANG. or about 0.1 .mu.m. For contact plugs having a diameter that exceeds about 0.16 .mu.m, filling with a TiN film deposited by CVD results in incomplete filling of the via, resulting in suboptimal operation of the IC.
Therefore, a method of filling a via which is less than about 0.16 .mu.m in diameter with a contact plug of TiN deposited by CVD and capping without a tungsten capping layer is needed.